A NAND flash memory device performs an erase operation in the unit of a memory block, and performs a program operation and a read operation in the unit of a page. In some instances, bit lines connected with memory cells are divided into even bit lines and odd bit lines. In this case, the memory cells connected to the even bit lines configure an even page, and the memory cells connected to the odd bit lines configure an odd page. When a page is divided into the even page and the odd page, a size of the page is also decreased to a half size.
A large page size is advantageous in terms of sequential performance. In contrast, a small page size is advantageous in terms of random performance.